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Designers today face escalating design costs and design timelines combined
with ever decreasing probability of right-first-time silicon. To further
reduce the cost, complexity and associated risk in bringing products to
market, CEVA has developed a range of system platforms which combine many
hardware and software elements which are essential to designers deploying
CEVA DSP cores. Our system platforms are comprised of:
- Hardware Infrastructure - multipurpose DSP subsystems that
integrate a CEVA DSP core, related peripherals and system interfaces
such as on-chip data and program memories, high-performance DMA controller,
Buffered Time Division Multiplexing Port (BTDMP), high-throughput Host
Processor Interface (HPI), and other interfaces.
- Software Environment - CEVA eases the integration burden
by providing a software development environment and software framework
for 'plug-and-play' algorithm integration into multi-tasking solutions
such as those demanded by wireless and media processing.
Our family currently includes four System-on-Chip (SoC) platforms:
- CEVA-XS1200A
- integrates additional features to CEVA-XS1100A, enhancing the system
processing power for applications such as digital multimedia devices.
The CEVA-XS1200A is the second generation of the powerful CEVA-XS1200
and introduces higher efficiency in terms of data port bandwidth, speed,
power and area.
- CEVA-XS1100A
- a complete, verified hardware platforms minimizing development efforts,
cost risks and time-to-market for wireless applications. The CEVA-XS1100A
is the second generation of the powerful CEVA-XS1100 and introduces
higher efficiency in terms of data port bandwidth, speed, power and
area.
- Xpert-TeakLite-II
- a complete, low power, low cost, programmable DSP subsystem, designed
for the embedded application markets. It includes configurable cached
program memory and direct data memory sizes, high performance Direct
Memory Access (DMA) controller, Buffered Time Division Multiplexing
Port (BTDMP), Host processor interface unit (PIU), standard AMBA bridges
(AHB & APB), optional Ethernet MAC, and more.
- Xpert-Teak -
complete DSP subsystem for low-power, low-cost SoC designs targeted
at applications such as wireless baseband and portfolio multimedia markets.
Xpert-Teak includes multiple hardware peripherals and incorporates on-chip
data and program memories, high-performance DMA controller, Buffered
Time Division Multiplexing Port (BTDMP), high-throughput Host Processor
Interface (HPI), and other interfaces.
The joint CEVA and ARM standard for hybrid RISC-DSP SoC design covers
the hardware interfaces between the cores. The standard supports sophisticated
mailbox-based command and control messaging and bulk-data passing, debug
and trace interfaces, protocols for multi-core debug, and APIs for inter-processor
communications. The standard also includes circuitry for low-latency message-passing
and bulk-data transfer integrated with powerful DMA capabilities. In addition
to this standard, ARM's RealView® Developer Suite multi-core debug tools
also provide support for CEVA DSP cores. CEVA System Platform's development
boards seamlessly combine with the ARM RealView Integrator™ platform.
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